fpga evalutation.

	XCVU9P	XCVU13P	XCVU19P	XCVU440	S10 10M
Vendor	xilinx	xilinx	xilinx	xilinx	intel
Tool	vivado	vivado	vivado	vivado	PlayerPro
System Logic Cells (K)	2586	3780	8939	5541	10200
I/O	832	832	2072	1456	2304
Memory (Mb)	345.9	455	224	88.6	253
BRAM	2160	2688		2520
URAM	960	1280		0
DSP Slices	6840	12288	3840	2880	6912
Transceivers	GTY-120	GTY-128	GTY-80	GTH-48	GTH-40

The block RAM in UltraScale architecture-based devices stores up to 36 Kbits of data and can be configured as either two independent 18 Kb RAMs, or one 36 Kb RAM.

Each block RAM has two write and two read ports. A 36 Kb block RAM can be configured with independent port widths for each of those ports as 32K x 1, 16K x 2, 8K x 4, 4K x 9, 2K x 18 or 1K x 36 (when used as true dual-port (TDP) memory).

UltraRAM is a flexible, high-density memory building block. Each UltraRAM block can store up to 288K bits of data and is configured as a 4K x 72 memory block.

GTY: 30.5 Gb/s

GTH: 16.3 Gb/s

Reference

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https://www.xilinx.com/products/silicon-devices/fpga/virtex-ultrascale-plus.html#productTable
https://china.xilinx.com/products/silicon-devices/fpga/virtex-ultrascale.html#productTable
ug573-ultrascale-memory-resources.pdf